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i ntegrated c ircuits d ivision ds-cpc7581- r06 www.ixysic.com 1 not for new designs features ? low, matched r on ? eliminates the need for zero-cross switching ? 5v operation with power consumption < 10 mw ? flexible switch timing for transition from ringing mode to idle/talk mode ? clean, bounce-free switching ? tertiary protection consisting of integrated current limiting, thermal shutdown for slic protection ? intelligent battery monitor ? latched logic-level inputs, no external drive circuitry required ? soic package pin-compatible with legerity product ? small 16-pin soic package ? monolithic ic reliability applications ? central office (co) ? digital loop carrier (dlc) ? pbx systems ? digitally added main line (daml) ? hybrid fiber coax (hfc) ? fiber in the loop (fitl) ? pair gain system ? channel banks description the cpc7581 is a monolithic solid-state four-pole switch in a 16-pin package. it provides the necessary functions to replace a 2-form-c electromechanical relay on traditional analog and integrated voice and data (ivd) line cards found in central office, access, and pbx equipment. the cpc7581 contains solid-state switches for tip and ring lead line break and ringing injection/ringing return. the device requires only a +5 v supply, and offers break-before-make and make-before-break operation using logic-level inputs. the CPC7581BA versions include an scr that provides protection to the slic and subsequent circuitry during a fault condition. ordering information figure 1. cpc7581 block diagram part # description CPC7581BA 16-pin soic, with protection scr, 50/tube CPC7581BAtr 16-pin soic, with protection scr, 1000/reel cpc7581bb 16-pin soic, without protection scr, 50/tube cpc7581bbtr 16-pin soic, without protection scr, 1000/reel cpc75 8 1 t li n e r li n e t bat v dd r bat d g n d v bat f g n d v ref i n ri n gi n g t sd latch 3 6 14 2 7 8 9 16 1 12 15 10 11 l a t c h s w itch control logic scr and trip circ u it cpc75 8 1ba) secondary protection +5 v dc tip ring slic x x x x s w 2 s w 4 v bat ri n gi n g 300 (min.) t ri n g s w 3 s w 1 e 3 pb cpc7581 line card access switch
i ntegrated c ircuits d ivision 2 www.ixysic.com r06 cpc7581 1 specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 pinout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.3 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.4 esd rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.5 general conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.6 switch specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.6.1 break switches, sw1 and sw2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.6.2 ringing return switch, sw3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.6.3 ringing switch, sw4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.7 additional electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.8 protection circuitry electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 1.9 truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 functional description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.1 introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2 switch logic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2.1 make-before-break operation logic tabl e (ringing to talk transition) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.2.2 break-before-make operation logic tabl e (ringing to talk transition) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.3 data latch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.4 t sd . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.5 ringing switch zero-cross current turn off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.6 power supplies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.7 battery voltage monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.8 protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.8.1 diode bridge/scr. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.8.2 current limiting function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2.9 external protection elements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 3 manufacturing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
i ntegrated c ircuits d ivision cpc7581 r06 www.ixysic.com 3 1 specifications 1.1 package pinout 1.2 pinout cpc7581 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 t bat dd f gnd t line nc nc t ringing v t sd v bat r bat r line nc r ringing latch ringing in d gnd pin name description 1 f gnd fault ground 2 t bat tip lead of the slic 3 t line tip lead of the line side 4 nc no connection 5 nc no connection 6 t ringing ringing generator return 7 v dd +5 v supply 8 t sd temperature shutdown pin 9 d gnd digital ground 10 in ringing logic control input 11 latch data latch enable control input 12 r ringing ringing generator source 13 nc no connection 14 r line ring lead of the line side 15 r bat ring lead of the slic 16 v bat battery supply
i ntegrated c ircuits d ivision 4 www.ixysic.com r06 cpc7581 1.3 absolute maximum ratings absolute maximum electrical ratings are at 25c. absolute maximum ratings are stress ratings. stresses in excess of these ratings can cause permanent damage to the device. functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this data sheet is not implied. exposure of the device to the absolute maximum ratings for an extended period may degrade the device and affect its reliability. 1.4 esd rating 1.5 general conditions unless otherwise specified, minimum and maximum values are production testing requirements. typical values are characteristic of the device at 25c and are the result of engineering evaluations. they are provided for informational purposes only and are not part of the manufacturing testing requirements. specifications cover the operating temperature range t a = -40c to +85c. also, unless otherwise specified all testing is performed with v dd = +5v dc , logic low input voltage is 0v dc and logic high input voltage is +5v dc . parameter minimum maximum unit +5 v power supply (v dd ) -0.3 7 v battery supply - -85 v d gnd to f gnd separation -5 +5 v logic input voltage -0.3 v dd + 0.3 v logic input to switch output isolation -320v switch open-contact isolation (sw1, sw2, sw3) -320v switch open-contact isolation (sw4) -465v operating relative humidity 5 95 % operating temperature -40 +110 ? c storage temperature -40 +150 ? c esd rating (human body model) 1000 v
i ntegrated c ircuits d ivision cpc7581 r06 www.ixysic.com 5 1.6 switch specifications 1.6.1 break switches, sw1 and sw2 parameter conditions symbol minimum typical maximum unit off-state leakage current +25 c v sw (differential) = -320 v to gnd v sw (differential) = +260 v to -60 v i sw - 0.1 1 ? a +85 c v sw (differential) = -330 v to gnd v sw (differential) = +270 v to -60 v 0.3 -40 c v sw (differential) = -310 v to gnd v sw (differential) = +250 v to -60 v 0.1 r on +25 c i sw = 10 ma, 40 ma, r bat and t bat = -2 v r on - 14.5 - ? +85 c 20.5 28 -40 c 10.5 - r on match per on-resistance test condition of sw1, sw2. magnitude r on sw1-r on sw2 ? r on - 0.15 0.8 dc current limit +25 c v sw (on) = 10 v i sw - 300 - ma +85 c 80 160 - -40 c - 400 425 dynamic current limit (t ? 0.5 ? s) break switches on, all other switches off, apply 1 kv at 10x1000 ? s pulse, with appropriate protection in place. -2.5- a logic input to switch output isolation +25 c v sw (t line , r line ) = 320 v, logic inputs = gnd i sw - 0.1 1 ? a +85 c v sw (t line , r line ) = 330 v, logic inputs = gnd 0.3 -40 c v sw (t line , r line ) = 310 v, logic inputs = gnd 0.1 dv/dt sensitivity - - 200 - v/ ? s
i ntegrated c ircuits d ivision 6 www.ixysic.com r06 cpc7581 1.6.2 ringing return switch, sw3 parameter conditions symbol minimum typical maximum unit off-state leakage current +25 c v sw (differential) = -320 v to gnd v sw (differential) = +260 v to -60 v i sw - 0.1 1 ? a +85 c v sw (differential) = -330 v to gnd v sw (differential) = +270 v to -60 v 0.3 -40 c v sw (differential) = -310 v to gnd v sw (differential) = +250 v to -60 v 0.1 r on +25 c i sw (on) = 0 ma, 10 ma r on - 60 - ? +85 c 85 100 -40 c 45 - dc current limit +25 c v sw (on) = 10 v i sw - 135 - ma +85 c 70 85 -40 c - 210 dynamic current limit (t ? 0.5 ? s) ringing switches on, all other switches off, apply 1 kv at 10x1000 ? s pulse, with appropriate protection in place. 2.5 a logic input to switch output isolation +25 c v sw (t ringing , t line ) = 320 v, logic inputs = gnd i sw - 0.1 1 ? a +85 c v sw (t ringing , t line ) = 330 v, logic inputs = gnd 0.3 -40 c v sw (t ringing , t line ) = 310 v, logic inputs = gnd 0.1 dv/dt sensitivity - - 200 - v/ ? s
i ntegrated c ircuits d ivision cpc7581 r06 www.ixysic.com 7 1.6.3 ringing switch, sw4 parameter conditions symbol minimum typical maximum unit off-state leakage current +25 c v sw (differential) = -255 v to +210 v v sw (differential) = +255 v to -210 v i sw - 0.05 1 ? a +85 c v sw (differential) = -270 v to +210 v v sw (differential) = +270 v to -210 v 0.1 -40 c v sw (differential) = -245 v to +210 v v sw (differential) = +245 v to -210 v 0.05 on voltage i sw (on) = 1 ma -1.53v ringing generator current to ground during ringing v dd = 5 v, in ringing = 0 i ringing 0.1 0.25 ma on steady-state current* inputs set for ringing mode i sw - 150 ma surge current* ringing switches on, all other switches off, apply 1 kv at 10x1000 ? s pulse, with appropriate protection in place. --2a release current - i ringing 300 - ? a r on i sw (on) = 70 ma, 80 ma r on 10 15 ? logic input to switch output isolation +25 c v sw (r ringing , r line ) = 320 v, logic inputs = gnd i sw - 0.1 1 ? a +85 c v sw (r ringing , r line ) = 330 v, logic inputs = gnd 0.3 -40 c v sw (r ringing , r line ) = 310 v, logic inputs = gnd 0.1 dv/dt sensitivity - - 200 - v/ ? s *secondary protection and ringing source current limiting must prevent exceeding this parameter.
i ntegrated c ircuits d ivision 8 www.ixysic.com r06 cpc7581 1.7 additional electri cal characteristics parameter conditions symbol minimum typical maximum unit digital input characteristics input low voltage - v il -2.21.5 v input high voltage - v ih 3.5 2.3 - input leakage current (high) v dd = 5.5 v, v bat = -75 v, v ih = 5 v i ih -0.11 ? a input leakage current (low) v dd = 5.5 v, v bat = -75 v, v il = 0 v i il -0.11 voltage requirements v dd - v dd 4.5 5.0 5.5 v v bat 1 - v bat -19 -48 -72 v 1 v bat is used only for internal protection circuitry. if v bat goes more positive than -10 v, the device will enter the all-off state and will remain in the all-off state until the battery goes more negative than -15 v power requirements power consumption in talk and all-off states v dd = 5 v, v bat = -48 v, measure i dd and i bat p -5.510 mw power consumption in ringing state 6.5 10 v dd current in talk and all-off states v dd = 5 v, v bat = -48 v i dd -1.12.0 ma v dd current in ringing state -1.32.0 v bat current in any state i bat -0.110 ? a temperature shutdown requirements (temp erature shutdown flag is active low) shutdown activation temperature -- 110 125 150 c shutdown circuit hysteresis 10 - 25 temperature shutdown requirements are not production tested, but rather guaranteed by design.
i ntegrated c ircuits d ivision cpc7581 r06 www.ixysic.com 9 1.8 protection circuitry el ectrical specifications 1.9 truth table parameter conditions symbol minimum typical maximum unit parameters related to the diodes in the diode bridge voltage drop at continuous current (50/ 60 hz) apply dc current limit of break switches forward voltage -2.13 v voltage drop at surge current apply dynamic current limit of break switches forward voltage -5- parameters related to the protection scr surge current - - - - * a trigger current t=+25c i trig - 60 (cpc7581xa) 70 (cpc7581xc) -ma t=+85c 35 (cpc7581xa) 40 (cpc7581xc) hold current t=+25c i hold 110 (cpc7581xa) 135 (cpc7581xc) t=+85c 60 (cpc7581xa) 110 (cpc7581xc) 70 (cpc7581xa) 115 (cpc7581xc) gate trigger voltage i gate = i trigger ** v tbat or v rbat v bat -4 - v bat -2 v reverse leakage current v bat = -48 v i vbat --1.0 ? a on-state voltage 0.5 a, t = 0.5 ? sv tbat or v rbat - --3-v 2.0 a, t = 0.5 ? s--5-v *passes gr1089 and itu-t k.20 with appropriate secondary protection in place. **v bat must be capable of sourcing i trigger for the internal scr to activate. state in ringing latch t sd break switches ringing switches ta l k 0 0 z 1 on off ringing 1 off on latched x 1 unchanged all-off x x 0 off off 1 z = high impedance. because t sd has an internal pull up at this pin, it should be c ontrolled with an open-collector or open-drain type device.
i ntegrated c ircuits d ivision 10 www.ixysic.com r06 cpc7581 2 functional description 2.1 introduction the cpc7581 has three states: ? talk . line break switches sw1 and sw2 closed, ringing switches sw3 and sw4 open. ? ringing . ringing switches sw3 and sw4 closed, line break switches sw1 and sw2 open. ? all-off . all switches open. see ?truth table? on page 9 for more information. the cpc7581 offers break-before-make and make-before-break switching from the ringing state to the talk state with simple logic-level input control. solid-state switch construction means no impulse noise is generated when switching during ring cadence or ring trip, eliminating the need for external zero-cross switching circuitry. state control is via logic-level input so no additi onal driver circuitry is required. the line break switches sw1 and sw2 are linear switches that have exceptionally low r on and excellent matching characteristics. the ringing switch sw4 has a breakdown voltage rating of 465v @ 25c. this is sufficiently high, with proper protection, to prevent breakdown in the presence of a transient fault condition (i.e., passing the transient on to the ringing generator). integrated into the cpc7581 is a over voltage clamping circuit, active current limiting, and a thermal shutdown mechanism to provide protection to the slic device during a fault condition. positive and negative surges are reduced by the current limiting circuitry and hazardous potentials are steered to ground via diodes and, in cpc7581xa and cpc7581xc parts, an integrated scr. power-cross potentials are also reduced by the current limiting and thermal shutdown circuits. to protect the cpc7581 from an overvoltage fault condition, the use of a secondary protector is required. the secondary protector must limit the voltage seen at the tip and ring terminals to a level below the maximum breakdown voltage of the switches. to minimize the stress on the solid-state contacts, use of a foldback or crowbar type secondary protector is recommended. with proper selection of the secondary protector, a line card using the cpc7581 will meet all relevant itu, lssgr, tia/eia and iec protection requirements. the cpc7581 operates from a +5 v supply only. this gives the device extremely low idle and active power consumption and allows use wi th virtually any range of battery voltage. battery voltage is also used by the cpc7581 as a reference for the integrated protection circuit. in the event of a loss of battery voltage, the cpc7581 enters the all-off state. 2.2 switch logic the cpc7581 provides, when switching from the ringing state to the talk state, the ability to control the release timing of the ringing switches sw3 and sw4 relative to the state of the line break switches sw1 and sw2 using simple logic-level input. this is called make-before-break or break-before-make operation. when the line break switch contacts (sw1 and sw2) are closed (or made) before the ringing switch contacts (sw3 and sw4) are opened (or broken), this is called make-before-break operation. break-before-make operation occurs when the ringing contacts (sw3 and sw4) are opened (broken) before the line break contacts (sw1 and sw2) are closed (made). to use make-before-break ringing switch release timing, de-assert in ringing during ringing. this causes the operational sequence shown in ?make- before-break operation logic table (ringing to talk transition)? on page 11 to occur.
i ntegrated c ircuits d ivision cpc7581 r06 www.ixysic.com 11 2.2.1 make-before-break oper ation logic table (ringing to talk transition) to use break-before-make ringing switch release timing, assert t sd during ringing. this causes the operational sequence shown in ?break-before-make operation logic table (ringing to talk transition)? on page 11 to occur. logic states and explanations are given in ?truth table? on page 9 . 2.2.2 break-before-make oper ation logic table (ringing to talk transition) 2.3 data latch the cpc7581 has an integrated data latch. the latch operation is controlled by logic-level input pin 11 (latch). the data input of the latch is pin 10 (in ringing ), while the output of the data latch is an internal node used for state control. when the latch control pin is at logic 0, the data latch is transparent and data control signals flow directly through to state control. a change in input will be reflected in a change is switch state. when the latch control pin is at logic 1, the data latch is active and a change in input control will not affect switch state. the switches will remain in the position they were in when the latch changed from logic 0 to logic 1 and will not respond to changes in input as long as the latch is at logic 1. the t sd input is not tied to the data latch. therefore, t sd is not affected by the latch input and the t sd input will override state control. 2.4 t sd the thermal shutdown mechanism activates when the device die temperature reaches a minimum of 110 c, placing the device in the all-off state regardless of logic input. during thermal shutdown mode, pin 8 (t sd ) will read a nominal 0 v. normal output of t sd is typically equal to v dd . if presented with a short duration transient such as a lightning event, the thermal shutdown feature will typically not activate. but in an extended power-cross event, the device temperature will rise and the thermal shutdown will activate forcing the switches to the all-off state in ringing latch t sd timing break switches ringing return switch (sw3) ringing switch (sw4) ringing 1 0z -off on on make- before- break 0 sw4 waiting for next zero-current crossing to turn off. maximum time is one-half of the ringing cycle. in this transition state, current that is limited to the dc break switch current limit value will be sourced from the ring node of the slic. on off on talk 0 zero-cross current has occurred on off off state in ringing latch t sd timing break switches ringing return switch (sw3) ringing switch (sw4) ringing 1 0 z-off on on all-off 1 0 hold this state for one-half of the ringing cycle. sw4 waiting for zero current to turn off. off off on all-off 1 zero current has occu rred. sw4 has opened off off off talk 0 z release break switches on off off
i ntegrated c ircuits d ivision 12 www.ixysic.com r06 cpc7581 state. at this point the current measured through the break switches (sw1 and sw2) will drop to zero. once the device enters thermal shutdown it will remain in the all-off state until the temperature of the device drops below the de-activation level of the thermal shutdown circuit. this permits the device to return to normal operation. if the transient has not passed, current will flow at the value allowed by the dynamic dc current limi ting of the switches and heating will begin again, reactivating the thermal shutdown mechanism. this cycle of entering and exiting the thermal shutdown mode will continue as long as the fault condition persists. if the magnitude of the fault condition is great enough, the external secondary protector could activate and shunt all current to ground. the t sd pin is a pull-up current source with a nominal value of 300 ? a biased from v dd . for applications using low-voltage logic devices (lower than v dd ), ixys integrated circuits division recommends the use of an open-drain type output to control t sd . this avoids sinking the t sd bias current to ground during normal operation when the all-off state is not required. 2.5 ringing switch ze ro-cross current turn off after the application of a logi c input to turn sw4 off, the ringing switch is designed to delay the change in state until the next zero-crossing. once on, the switch requires a zero-current cross to turn off, and therefore should not be used to switch a pure dc signal. the switch will remain in the on state no matter the logic input until the next zero crossing. these switching characteristics will reduce and possibly eliminate overall system impulse noise normally associated with ringing switches. see ixys integrated circuits division?s application note an-144, impulse noise benefits of line card access switches for more information. the attributes of ringing switch sw4 may make it possible to eliminate the need for a zero-cross switching scheme. a minimum impedance of 300 ?? in series with the ring generator is recommended. 2.6 power supplies both a +5 v supply and battery voltage are connected to the cpc7581. cpc7581 switch state control is powered exclusively by the +5 v supply. as a result, the cpc7581 exhibits extrem ely low power dissipation during both active and all-off states. the battery voltage is not used for switch control but rather as a supply for the integrated secondary protection circuitry. the integrated scr is designed to trigger when pin 2 (t bat ) or pin 15 (r bat ) drops 2 to 4 v below the voltage on pin 16 (v bat ). this trigger prevents a fault-induced overvoltage event at the t bat or r bat nodes. 2.7 battery voltage monitor the cpc7581 also uses the v bat voltage to monitor battery voltage. if system battery voltage is lost, the cpc7581 immediately enters the all-off state. it remains in this state until the battery voltage is restored. the device also enters the all-off state if the system battery voltage goes more positive than ?10 v, and remains in the all-off state until the battery voltage goes more negative than ?15 v. this battery monitor feature draws a small current from the battery (less than 1 ? a typical) and adds slightly to the device?s overall power dissipation. due to the nature of the internal protection circuitry, the v bat pin can be biased via potentials applied to t bat or r bat . this allows the cpc7581 switches to operate, but offers no transient protection. the supply voltage applied to v bat should therefor be the same supply voltage applied to the line driver device. 2.8 protection 2.8.1 diode bridge/scr the cpc7581 uses a combination of current limited break switches, a diode bridge/scr clamping circuit, and a thermal shutdown mechanism to protect the slic device or other associated circuitry from damage during line transient events such as lightning. during a positive transient condition, the fault current is conducted through the diode bridge to ground via f gnd . voltage is clamped to a diode drop above ground. during a negative transient of 2 to 4 v more negative than the battery, the scr conducts and faults are shunted to f gnd via the scr or the diode bridge. in order for the scr to crowbar (or foldback), the on voltage (see ?protection circuitry electrical
i ntegrated c ircuits d ivision cpc7581 r06 www.ixysic.com 13 specifications? on page 9 ) of the scr must be less negative than the battery reference voltage. if the battery voltage is less negative than the scr on voltage, or if the v bat supply is unable to source the trigger current, the scr will not crowbar. for power induction or powe r-cross fault conditions, the positive cycle of the transient is clamped to a diode drop above ground and the fault current directed to ground. the negative cycle of the transient will cause the scr to conduct when the voltage exceeds the battery reference voltage by two to four volts, steering the current to ground. note: the cpc7581xb does not contain the protection scr. 2.8.2 current limiting function if a lightning strike transient occurs when the device in the talk state, the current is passed along the line to the integrated protection circuitry and limited by the dynamic current limit respon se of break switches sw1 and sw2. when a 1000v 10x1000 ? s pulse (gr-1089-core lightning) is applied to the line though a properly clamped external protector, the current seen through the break switches will be a pulse with a typical magnitude of 2.5 a and a duration of less than 0.5 ? s. if a power-cross fault occurs with the device in the talk state, the current is passed though the break switches sw1 and sw2 on to the integrated protection circuit and is limited by the dynamic dc current limit response of the two break switches. the dc current limit, specified over temperature, is between 80 ma and 425 ma, and the circuitry has a negative temperature coefficient. as a result, if the device is subjected to extended heating due to power cross fault, the measured current through the break switches (sw1 and sw2) will decrease as the device temperature increases. if the device temperature rises sufficiently, the temperature shutdown mechanism will activate and the device will enter the all-off state. 2.9 external protection elements the cpc7581 requires only overvoltage secondary protection on the loop side of the device. the integrated protection feature described above negates the need for protection on the other (usually slic) side. the secondary protector limits voltage transients to levels that do not exceed the breakdown voltage or input-output isolation barrier of the cpc7581. a foldback or crowbar type protector is recommended to minimize stresses on the device. consult ixys integrated circ uits division?s application note, an-100, ? designing surge and power fault protection circuits for solid state subscriber line interfaces ? for equations related to the specifications of external secondary protectors, fused resistors and ptcs.
i ntegrated c ircuits d ivision 14 www.ixysic.com r06 cpc7581 3 manufacturing information 3.1 moisture sensitivity all plastic encapsulated semiconductor packages are susc eptible to moisture ingression. ixys integrated circuits division clas sified all of its plastic encapsulated devices for moisture sensitivity according to the latest version of the joint industry standard, ipc/jedec j-std-020 , in force at the time of product evaluation. we test all of our products to the maximum conditions set forth in the standard, and guarantee proper operation of our devices when handled according to the limitations and information in that standard as well as to any limitations set forth in the information or standards referenced below. failure to adhere to the warnings or limitations as establ ished by the listed specificati ons could result in reduced product performance, reduction of operable life, and/or reduction of overall reliability. this product carries a moisture sensitivity level (msl) rating as shown below, and should be handled according to the requirements of the latest version of the joint industry standard ipc/jedec j-std-033 . 3.2 esd sensitivity this product is esd sensitive , and should be handled according to the industry standard jesd-625 . 3.3 reflow profile this product has a maximum body temperature and time rating as shown below. all other guidelines of j-std-020 must be observed. 3.4 board wash ixys integrated circuits division recommends the use of no-clean flux formulations. however, board washing to remove flux residue is acceptable, and the use of a s hort drying bake may be necessary. chlorine-based or fluorine- based solvents or fluxes should not be used. cleaning met hods that employ ultrasonic energy should not be used. device moisture sensitivity level (msl) rating CPC7581BA / cpc7581bb msl 1 device maximum temperature x time CPC7581BA / cpc7581bb 260c for 30 seconds e 3 pb
i ntegrated c ircuits d ivision cpc7581 r06 www.ixysic.com 15 3.5 mechanical dimensions 3.6 tape and reel packaging (inches) mm dime n sio n s n otes: 1. coplanarity = 0.1016 (0.004) max. 2. leadframe thickness does not incl u de solder plating (1000 microinch maxim u m). 0.406 0.076 (0.016 0.003) 10.211 0.254 (0.402 0.010) 7.493 0.127 (0.295 0.005) 10.312 0.3 8 1 (0.406 0.015) 1.270 typ (0.050 typ) 0.254 / +0.051 / -0.025 (0.010 / +0.002 / -0.001) 0. 88 9 0.17 8 (0.035 0.007) 0.649 0.102 (0.026 0.004) pi n 1 pi n 16 2.337 0.051 (0.092 0.002) 0.203 0.102 (0.00 8 0.004) 45o 2.00 (0.079) 1.27 (0.050) 9.40 (0.370) 0.60 (0.024) recommended pcb land pattern dimensions mm (inches) em b ossment em b ossed carrier top co v er tape thickness 0.102 max. (0.004 max.) 330.2 dia. (13.00 dia.) k 0 =3.20 (0.126) k 1 =2.70 (0.106) a 0 =10.90 (0.429) w =16 (0.630) b 0 =10.70 (0.421) p=12.00 (0.472) n otes: 1. all dimensions carry tolerances of eia standard 4 8 1-2 2. the tape complies w ith all ? n otes? for constant dimensions listed on page 5 of eia-4 8 1-2 for additional information please visit www.ixysic.com ixys integrated circuits division makes no representations or warranties with respect to the accuracy or completeness of the co ntents of this publication and reserves the right to make changes to s pecifications and product descri ptions at any time without notice. neither circuit paten t licenses or indemnity are expressed or implied. except as set forth in ixys integrated circuits div ision?s standard terms and conditions of sale, ixys integrated c ircuits division assumes no liability whatsoever, and disclaims any express or implied warranty relating to its products, including, but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right. the products described in this document ar e not designed, intended, aut horized, or warranted for use as components in systems i ntended for surgical implant into the body, or in other applications intended to support or sustain life, or where malfunction of ixys integrated circuits divisi on?s product may result in direct physical harm, injury, or death to a person or severe property or environmental damage. ixys integrated circuits division reserves the r ight to discontinue or make changes to its products at any time without notice. specification: ds-cpc7581-r06 ? copyright 2012, ixys integrated circuits division all rights reserved. printed in usa. 12/18/2012

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